Work Experience
Industry experience in AI infrastructure, EDA acceleration, and memory design.
2026–Present
ByteDance Seed
Research Scientist
Research Scientist in the AI Infrastructure team.
Summer 2024
Summer 2025
Summer 2025
ByteDance Seed
Research Scientist Intern
Developed communication backends and link-congestion-aware overlap models for large-language-model simulation across multi-hierarchical clusters; benchmarked the system against open-source LLM simulators.
Summer 2023
Cadence · Design and Signoff Group
Graduate Intern
Built an FPGA-based acceleration solution for early global routing using hardware parallel-prefix algorithms to speed up maze routing.
Summer 2022
Intel · E-core Custom Memory Team
Graduate Intern
Built a Python timing predictor for custom-memory macros, using an SQLite database of existing timing data to estimate unseen memory configurations.